MAX+plus II 10.2
Latest version:
10.2
See all
Developer:
Altera Corporation
Manage all kinds of logic design projects and create new ones by applying hierarchical designing tools, logic synthesis, timing-driven compilation, partitioning, functional and timing simulation, etc. The suite only works with legacy products and does not support MAX® II CPLDs, Cyclone®, Arria®, or Stratix® series FPGAs, or any newer devices.
MAX plus II offers full spectrum of logic design capabilities: a variety of design entry methods for hierarchical designs, powerful logic syntesis, timing-driven compilation, partitioning, functional and timing simulation, and device programing and verification.
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